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EUA6011A ds6011a ver 1.0 mar. 2006 1 3-w stereo audio power amplifier with advanced dc volume control descriptoin the EUA6011A is a stereo audio power amplifier that drives 3 w/channel of continuous rms power into a 3- ? load. advanced dc volume control minimizes external components and allows btl (speaker) volume control and se (headphone) volume control. notebook and pocket pcs benefit from the integrated feature set that minimizes external components without sacrificing functionality. to simplify design, the speaker volume level is adjusted by applying a dc voltage to the volume terminal. likewise, the delta between speaker volume and headphone volume can be adjusted by applying a dc voltage to the sediff terminal. to avoid an unexpected high volume level through the headphones, a third terminal, semax, limits the headphone volume level when a dc voltage is applied. finally, to ensure a smooth transition between active and shutdown modes, a fade mode ramps the volume up and down. features z advanced dc volume control with 2-db steps from -40 db to 20 db -fade mode -maximum volume setting for se mode -adjustable se volume control referenced to btl volume control z 3 w into 3- ? speakers z stereo input mux z differential inputs z rohs compliant and 100% lead (pb)-free applications z notebook pc z lcd monitors z pocket pc
EUA6011A ds6011a ver 1.0 mar. 2006 2 block diagram
EUA6011A ds6011a ver 1.0 mar. 2006 3 typical application circuit figure 1. application circuit using single-ended inputs and input mux figure 2. application circuit using differential inputs
EUA6011A ds6011a ver 1.0 mar. 2006 4 pin configurations package pin configurations(top view) tssop-24 with a thermal pad exposure on the bottom of the package pin description pin pin i/o description pgnd 1,13 - power ground lout- 12 o left channel negative audio output pv dd 3,11 - supply voltage terminal for power stage lhpin 10 i left channel headphone input, selected when line hp/ is held high llinein 9 i left channel line input, selected when line hp/ is held low lin 8 i common left channel input for fully differential input. ac ground for single-ended inputs. v dd 7 - supply voltage terminal rin 6 i common right channel input for fully differential input. ac ground for single-ended inputs. rlinein 5 i right channel line input, selected when line hp/ is held low rhpin 4 i right channel headphone input, selected when line hp/ is held high rout- 2 o right channel negative audio output rout+ 24 o right channel positive audio output shutdown 15 i places the amplifier in shutdown mode if a ttl logic low is placed on this terminal fad e 16 i places the amplifier in fade mode if a logic low is placed on this terminal; normal operation if a logic high is placed on this terminal bypass 17 i tap to voltage divider for internal midsupply bias generator used for analog reference agnd 18 - analog power supply ground semax 19 i sets the maximum volume for single ended operation. dc voltage range is 0 to v dd. sediff 20 i sets the difference between btl volume and se volume. dc voltage range is 0 to v dd. volume 21 i terminal for dc volume control. dc voltage range is 0 to v dd. line hp/ 22 i input mux control. when logic high, rh pin and lhpin inputs are selected .when logic low, rlinein and llinein inputs are selected. btl se/ 23 i output mux control. when this terminal is high, se outputs are selected. when this terminal is low, btl outputs are selected. lout+ 14 o left channel positive audio output.
EUA6011A ds6011a ver 1.0 mar. 2006 5 ordering information order number package type markin g operating temperature range EUA6011Aqir1 tssop 24 xxxx EUA6011A -40 c to 85c EUA6011Aqit1 tssop 24 xxxx EUA6011A -40 c to 85c EUA6011A ?? ?? ?? ?? lead free code 1: lead free 0: lead packing r: tape& reel t: tube operating temperature range i: industry standard package type q: tssop
EUA6011A ds6011a ver 1.0 mar. 2006 6 absolute maximum ratings ? supply voltage, v dd ------------------------------------------------------------------------------------------------ 6v ? input voltage, v i ------------------------------------------------------------------------------ ?0.3 v to v dd +0.3 v ? continuous total power dissipation---------------------------- inte rnally limited (see dissipation rating table) ? operating free-air temperature range, t a --------------------------------------------------------- ?40 x c to 85 x c ? operating junction temperature range, t j ------------------------------------------------------ - ?40 x c to 150 x c ? storage temperature range, t stg ------------------------------------------------------------------ -- ?65 x c to 150 x c ? lead temperature 1,6 mm (1/16 inch) from case for 10 seconds----------------------------------------- 260 x c ? thermal resistance ja (tssop) ----------------------------------------------------------------------------------------------- 87.9c/w recommended operating conditions min max unit supply voltage, v dd 4 5.5 v btl se/ , line hp/ , fade v dd 0.8 high-level input voltage, v ih shutdown 2 v btl se/ , line hp/ , fade v dd 0.6 low-level input voltage, v il shutdown 0.8 v operating free-air temperature, t a -40 85 c electrical characteristics at specified free-air temperature, vdd = pvdd=5.5v, t a = 25c EUA6011A symbol parameter conditions min. typ. max. unit v dd= 5.5v,gain=0 db, btl se/ = 0v 30 mv oo v output offset voltage (measured differentially) v dd= 5.5v,gain=20 db, btl se/ = 0v 50 mv psrr power supply rejection ratio v dd = pv dd= 4 v to 5.5 v -42 -70 db ih i high-level input current ( btl se/ , shutdown , fade , line hp/ , semax, volume,sediff) v dd = pv dd= 5.5v, v i = v dd =pv dd 1 a il i low-level input current v dd = pv dd= 5.5v, v i = 0v 1 a v dd = pv dd= 5.5v, , btl se/ = 0v , shutdown =2v 6 7.5 9 i dd supply current, no load v dd = pv dd= 5.5v, , btl se/ = 5.5v shutdown =2v 3 5 6 ma i dd supply current, max power into a 3- [ load v dd = pv dd= 5.5v, , btl se/ = 0v , shutdown =2v,r l =3 ? , po=2 w, stereo 1.5 a rms i dd(sd) supply current, shutdown mode shutdown =0v 1 20 a
EUA6011A ds6011a ver 1.0 mar. 2006 7 operating characteristics, vdd =pvdd= 5v, t a = 25c, r l = 3 ? , gain =6 db EUA6011A symbol parameter conditions min. typ. max. unit thd=1%, f=1khz 2 p o output power thd=10%, f=1khz,v dd =5.5v 3 w thd+n total harmonic distortion plus noise p o =1w, r l =8 ? ,f=1 khz <0.4% v oh high-level output voltage r l =8 ? ,measured between output and v dd 700 mv v ol low-level output voltage r l =8 ? ,measured between output and gnd 400 mv v (bypass) bypass voltage (nominally v dd/ 2) measured at pin 17,no load, v dd =5.5v 2.65 2.75 2.85 v b om maximum output power bandwidth thd=5% ?? 20 khz btl mode -63 db supply ripple rejection ratio f =1khz,gain=0 db c (byp) =0.47f se mode -57 db noise output voltage f=20 hz to 20 khz, gain=0 db, c (byp) =0.47f, btl mode 36 v rms z i input impedance (see figure 25) volume=5 v 14 k [
EUA6011A ds6011a ver 1.0 mar. 2006 8 figure 3 figure 4 figure 5 figure 6 figure 7 figure 8
EUA6011A ds6011a ver 1.0 mar. 2006 9 figure 9 figure 10 figure 11 figure 12 figure 13 figure 14
EUA6011A ds6011a ver 1.0 mar. 2006 10 figure 15 figure 16 figure 17 figure 18 figure 19 figure 20
EUA6011A ds6011a ver 1.0 mar. 2006 11 figure 21 figure 22 figure 23 figure 24 figure 25
EUA6011A ds6011a ver 1.0 mar. 2006 12 application information table 1. dc volume control (btl mode, v dd =5v) (1) volume(pin21) from(v) to(v) gain of amplifier (db) 0.00 0.26 -85 (2) 0.33 0.37 -40 0.44 0.48 -38 0.56 0.59 36 0.67 0.70 -34 0.78 0.82 -32 0.89 0.93 -30 1.01 1.04 -28 1.12 1.16 -26 1.23 1.27 -24 1.35 1.38 -22 1.46 1.49 -20 1.57 1.60 -18 1.68 1.72 -16 1.79 1.83 -14 1.91 1.94 -12 2.02 2.06 -10 2.13 2.17 -8 2.25 2.28 -6 (2) 2.36 2.39 -4 2.47 2.50 -2 2.58 2.61 0 2.70 2.73 2 2.81 2.83 4 2.92 2.95 6 3.04 3.06 8 3.15 3.17 10 3.26 3.29 12 3.38 3.40 14 3.49 3.51 16 3.60 3.63 18 3.71 5.00 20 (2) (1)for other values of v dd ,scale the voltage values in the table by a factor of v dd /5. (2)tested in production. remaining gain steps are specified by design.
EUA6011A ds6011a ver 1.0 mar. 2006 13 table 2. dc volume control (se mode, v dd =5v) (1) volume=volume-sediff or semax from(v) to(v) gain of amplifier (db) 0.00 0.26 -85 (2) 0.33 0.37 -46 0.44 0.48 -44 0.56 0.59 -42 0.67 0.70 -40 0.78 0.82 -38 0.89 0.93 -36 1.01 1.04 -34 1.12 1.16 -32 1.23 1.27 -30 1.35 1.38 -28 1.46 1.49 -26 1.57 1.60 -24 1.68 1.72 -22 1.79 1.83 -20 1.91 1.94 -18 2.02 2.06 -16 2.13 2.17 -14 2.25 2.28 -12 2.36 2.39 -10 2.47 2.50 -8 2.58 2.61 -6 (2) 2.70 2.73 -4 2.81 2.83 -2 2.92 2.95 0 (2) 3.04 3.06 2 3.15 3.17 4 3.26 3.29 6 (2) 3.38 3.40 8 3.49 3.51 10 3.60 3.63 12 3.71 5.00 14 (1)for other values of v dd ,scale the voltage values in the table by a factor of v dd /5. (2)tested in production. remaining gain steps are specified by design.
EUA6011A ds6011a ver 1.0 mar. 2006 14 volume,sediff, and semax operation three pins labeled volume, sediff, and semax control the btl volume when driving speakers and the se volume when driving headphones. all of these pins are controlled with a dc voltage, which should not exceed v dd . when driving speakers in btl mode, the volume pin is the only pin that controls the gain. table 1 shows the gain for the btl mode. the voltages listed in the table are for v dd =5v. for a different v dd, the values in the table scale linearly . if v dd= 4v , multiply all the voltages in the table by 4 v/5v, or 0.8. the EUA6011A allows the user to specify a difference between btl gain and se gain. this is desirable to avoid any listening discomfort when plugging in headphones. when switching to se mode, the sediff and semax pins control the singe-ended gain proportional to the gain set by the voltage on the volume pin,. when sediff =0v, the difference between the btl gain and the se gain is 6db. refer to the section labeled bridged-tied load versus single-ended load for an explanation on why the gain in btl mode is 2x that of singl e-ended mode, or 6db greater. as the voltage on the sediff terminal is increased, the gain in se mode decreases. the voltage on the sediff terminal is subtracted from the voltage on the volume terminal and this value is used to determine the se gain. some audio systems require that the gain be limited in the single-ended mode to a level that is comfortable for headphone listening. most volume control devices only have one terminal for setting the gain. for example, if the speaker gain is 20db , the gain in the headphone channel is fixed at 14db. this level of gain could cause discomfort to listeners and the semax pin allows the designer to limit this discomfort when plugging in headphones. the semax terminal controls the maximum gain for single-ended mode. the functionality of the sediff and semax pin are combined to set the se gain. a block diagram of the combined functionality is shown in figure 26. the value obtained from the block diagram for se_volume is a dc voltage that can be used in conjunction with table 2 to determine the se gain. again, the voltages listed in the table are for v dd =5v . the values must be scaled for other values of v dd. table 1 and table 2 show a range of voltages for each gain step . there is a gap in the voltage between each gain step . this gap represents the hysteresis about each trip point in the internal comparator. the hysteresis ensures that the gain control is monotonic and does not oscillate form one gain step to another . if a potentiometer is used to adjust the voltage on the control terminals, the gain increases as the potentiometer is turned in one direction and decreases as it is turned back the other direction. the trip point, where the gain actually changes , is different depending on whether the voltage is increased or decreased as a result of the hysteresis about each trip poi nt. the gaps in table 1 and table 2 can also be through of as indeterminate states where the gain could be in the next higher gain step or the lower gain step depending on the direction the voltage is changing .if using a dac to control the volume, set the voltage in the middle of each range to ensure that the desired gain is achieved. a pictorial representation of the volume control can be found in figure 27.the graph focuses on three gain steps with the trip points defined in table 1 for btl gain. the dotted line represents the hysteresis about each gain step. figure 26. block diagram of se volume control figure 27. dc volume control operation
EUA6011A ds6011a ver 1.0 mar. 2006 15 line hp/ operation the line hp/ input controls the internal input multiplexer (mux).refer to the block diagram in figure 30.this allows the device to switch between two separate stereo inputs to the amplifier. for design flexibility, the line hp/ control is independent of the output mode, se or btl, which is controlled by the aforementioned btl se/ pin. to allow the amplifier to switch from the line inputs to the hp inputs when the output switches from btl mode to se mode, simply connect the btl se/ control input to the line hp/ input. when this input is logic high, the rhpin and lhpin inputs are selected .when this terminal is logic low, the rlinein and llinein inputs ar e selected. this operation is also detailed in table 4 and the trip levels for a logic low (v il ) or logic high (v ih ) can be found in the recommended operation conditions table. shutdown modes the EUA6011A employs a shutdown mode of operation designed to reduce supply current, i dd , to the absolute minimum level during periods of nonuse for battery-power conservation. the shutdown input terminal should be held high during normal operation when the amplifier is in use. pulling shutdown low causes the outputs to mute and the amplifier to enter a low-current state, i dd <1 a. shutdown should never be left unconnected because amplifier operation would be unpredictable. table 3 . line hp/ , btl se/ , and shutdown function inputs amplifier state line hp/ btl se/ shutdown input output x x low x mute low low high line btl low high high line se high low high hp btl high high high hp se x= do not care fade operation for design flexibility, a fade mode is provided to slowly ramp up the amplifier gain when coming out of shutdown mode and conversely ramp the gain down when going into shutdown. this mode provides a smooth transition between the active and shutdown states and virtually eliminates any pops or clicks on the outputs. when the fade input is a logic low, the device is placed into fade-on mode. a logic high on this pin places the amplifier in the fade-off mode . the voltage trip levels for a logic low (vil) or logic high (vih) can be found in the recommended operating conditions table. when a logic low is applied to the fade pin and a logic low is then applied on the shutdown pin, the channel gain steps down from gain step to gain step at a rate of two clock cycles per step. with a nominal internal clock frequency of 58hz,this equates to 34 ms (1/24 hz) per step. the gain steps down until the lowest gain step is reached .the time it takes to reach this step depends on the gain setting prior to placing the device in shutdown. for example, if the amplifier is in the highest gain mode of 20db, the time it takes to ramp down the channel gain is 1.05 seconds. this number is calculated by taking the number of steps to reach the lowest gain from the highest gain, or 31 steps , and multiplying by the time per step, or 34 ms. after the channel gain is ste pped down to the lowest gain, the amplifier begins discharging the bypass capacitor from the nominal voltage of vdd/2 to ground. this time is dependent on the value of the bypass capacitor. for a 0.47- f capacitor that is used in the application diagram in figure 1, the time is approximately 500ms. this time scales linearly with the value of bypass capacitor. for example, if a 1- f capacitor is used for bypass, the time period to discharge the capacitor to ground is twice that of the 0.47- f capacitor, or 1 second. figure 30 below is a waveform captured at the output during the shutdown sequence when the part is in fade-on mode. the gain is set to the highest level and the output is at vdd when the amplifier is shut down. when a logic high is placed on the shutdown pin and the fade pin is still held low, the device begins the start-up process, the bypass capacitor will begin charging. once the bypass voltage reaches the final value of vdd/2 ,the gain increases in2-db steps from the lowest gain level to the gain level se t by the dc voltage applied to the volume, sediff, and semax pins. in the fade-off mode, the amplifier stores the gain value prior the staring the shutdown sequence. the output of the amplifier immediately drops to vdd/2 and the bypass capacitor begins a smooth discharge to ground when shutdown is released, the bypass capacitor charges up to vdd/2 and the channel gain returns immediately to the value stored in memory. figure 31 below is a waveform captured at the output during the shutdown sequence when
EUA6011A ds6011a ver 1.0 mar. 2006 16 the part is in the fade-off mode. the gain is set to the highest level, and the output is at vdd when the amplifier is shut down. the power-up sequence is different from the shutdown sequence and the voltage on the pin does not change the power-up sequence. upon a power-up condition, the EUA6011A begins in the lowest gain setting and steps up 2 db every 2 clock cycles until the final value is reached as determined by the dc voltage applied to the volume, sediff , and semax pins. bridged-tied load versus single-ended mode figure 28 show a class-ab audio power amplifier (apa) in a btl configuration. the EUA6011A btl amplifier consists of two class-ab ampl ifiers driving both ends of the load. there are several potential benefits to this differential drive configuration, but initially consider power to the load. the differential drive to the speaker means that as one side is sl ewing up, the other side is slewing down, and vice versa. this in effect doubles the voltage swing on the load as compared to a ground referenced load. plugging 2v o(pp) into the power equation, where voltage is squared, yields 4 the output power from the same supply rail and load impedance(see equation 1) v (rms) = power = ------(1) figure 28.bridge-tied load configuration in a typical computer sound channel operating at 5v, bridging raises the power into an 8- ? speaker from a singled-ended (se, ground reference) limit of 250 mw to 1w. in sound power that is a 6-db improvement, which is loudness that can be heard. in addition to increased power there are frequency response concerns. consider the single-supply se configura tion shown in figure 29. a coupling capacitor is required to block the dc offset voltage from reaching the load. these capacitors can be quite large (approximately 33 f to 1000 f) so they tend to be expensive, heavy, occupy valuable pcb area, and have the additional drawback of limiting low-frequency performance of the system. this frequency limiting effect is due to the high pass filter network created with the speaker impedance and the coupling capacitance and is calculated with equation 2. f c = c c l r 2 1 ----------------------------------(2) for example, a 68 f capacitor with an 8- ? speaker would attenuate low frequencies below 293 hz. the btl configuration cancels the dc offsets, which eliminates the need for the blocking capacitors. low-frequency performance is then limited only by the input network and speaker response. cost and pcb space are also minimized by eliminating the bulky coupling capacitor. figure 29. single-ended configuration and frequency response increasing power to the load does carry a penalty of increased internal power dissipation. the increased dissipation is understandable considering that the btl configuration produces 4 ?? the output power of the se configuration. internal dissi pation versus output power is discussed further in the crest factor and thermal considerations section . single-ended operation in se mode the load is driven from the primary amplifier output for each channel (out+, terminals 21 and 4 ). the amplifier switches single-ended operation when the btl se/ terminal is held high. this puts the negative outputs in a high-impedance state, and reduces the amplifier?s gain to 1v/v. input mux operation the input mux allows two separate inputs to be applied to the amplifier. this allow the designer to choose which input is active independent of the state of the btl se/ terminal. when the line hp/ terminal is held high, the headphone inputs are active. when the line hp/ terminal is held low, the line btl inputs are active. 2 2 o(pp) v l r 2 (rms) v
EUA6011A ds6011a ver 1.0 mar. 2006 17 btl se/ operation the ability of the EUA6011A to easily switch between btl and se modes is one of its most important cost saving features. this feature eliminates the requirement for an additional headphone amplifier in applications where internal stereo speakers are driven in btl mode but external headphone or speakers must be accommodated. internal to the EUA6011A , two separate amplifiers drive out+ and out- .the btl se/ input (terminal 15) control the operation of the fo llower amplifier that drives lout- and rout- (terminals 9 and 16).when btl se/ is held low, the amplifier is on and the EUA6011A is in the btl mode. when btl se/ is held high, the out- amplifiers are in a high output impedance state, which configures the EUA6011A as an se driver from lout+ and rout+ (terminals 4 and 21). i dd is reduced by approximately one-half in se mode. control of the btl se/ input can be from a logic-level cmos source or, more typically, from a resistor divider network as shown in figure 30. figure 30. resistor di vider network circuit 2 using a readily available 1/8-in. (3.5mm) stereo headphone jack, the control switch is closed when no plug is inserted. when closed the 100-k ? /1-k ? divider pulls the btl se/ input low. when a plug is inserted, the 1-k ? resistor is disconnected and the btl se/ input is pulled high. when the input goes high, the out- amplifier is shut down causing the speaker to mute(virtually open-circuits the speaker).the out+ amplifier then drives through the output capacitor (c o ) into the headphone jack. input resistance each gain setting is achieved by varying the input resistance of the amplifier, which can range from its smallest value to over 6 times that value. as a results, if a single capacitor is used in the input high-pass filter, the ?3 db or cut-off frequency will also change by over 6 times. figure 31. input resistor the-3db frequency can be calculated using equation 3: f -3db = -------------- (3) if the filter must be more accurate, the value of the capacitor should be increased while the value of the resistor to ground should be decreased. in addition, the order of the filter could be increased. input capacitor, c i in the typical application an input capacitor, c i , is required to allow the amplifier to bias the input signal to the proper dc level for optimum operation. in this case, c i and the input impedance of the amplifier, z i , from a high-pass filter with the corner frequency determined in equation 4. f c(highpass) = i i c z 2 1 -----------------(4) the value of c i is important to consider as it directly affects the bass (low frequency) performance of the circuit. consider the example where z i is 70k ? and the specification calls for a flat bass response down to 40hz. equation 2 is reconfigured as equation 5. c i = c f z 2 1 i ----------------------------(5 ) ) i r || (r c 2 1
EUA6011A ds6011a ver 1.0 mar. 2006 18 in this example, c i is 56nf so one would likely choose a value in the range of 56nf to 1 f. a further consideration for this capacitor is the leakage path from the input source through the input network (c i ) and the feedback network to the load. this leakage current creates a dc offset voltage at the input to the amplifier that reduces useful headroom, especially in high gain applications. for this reason, a low- leakage tantalum or ceramic capacitor is the best choice. when polarized capacitors are used, the positive side of the capacitor should face the amplifier input in most applications as the dc level there is held at v dd /2, which is likely higher than the source dc level. note that it is important to confirm the capacitor polarity in the application. decoupling capacitor, (c s ) the EUA6011A is a high-performance cmos audio amplifier that requires adequate power supply decoupling to ensure the output total harmonic distortion (thd) is as low as possible. power supply decoupling also prevents oscillations for long lead lengths between the amplifier and the speaker. the optimum decoupling is achieved by using two capacitors of different types that target different types of noise on the power supply leads. for higher frequency transients, spikes, or digital hash on the line, a good low equivalent-series-resistance (esr) ceramic capacitor, typically 0.1 f placed as close as possible to the device v dd lead, works best. for filtering lower-frequency noise signals, a larger aluminum electrolytic capacitor of 10 f or greater placed near the audio power amplifier is recommended. bypass capacitor, (c b ) the bypass capacitor, c b , is the most critical capacitor and serves several important functions. during start-up or recovery from shutdown mode, c b determines the rate at which the amplifier starts up. the second function is to reduce noise produced by the power supply caused by coupling into the output drive signal. this noise is from the midrail generation circuit internal to the amplifier, which appears as degraded psrr and thd+n. bypass capacitor, c b , values of 0.47 f to 1 f ceramic or tantalum low-esr capacitors are recommended for the best thd and noise performance. output coupling capacitor, (c c ) for general signal-supply se configuration, the output coupling capacitor (c c ) is required to block the dc bias at the output of the amplifier thus preventing dc currents in the load. as with the input coupling capacitor, the output coupling capacitor and impedance of the load form a high-pass filter governed by equation 6. f c(high) = c c l r 2 1 -------------------(6) the main disadvantage, from a performance standpoint, is the load impedances are typically small, which drives the low-frequency corner higher, degrading the bass response. large values of c c are required to pass low frequencies into the load. consider the example where a c c of 330 f is chosen and loads vary from 3 ? , 4 ? , 8 ? , 32 ? , 10k ? , to 47k ? . table 3 summarizes the frequency response characteristics of each configuration. table4. common load impedances vs low frequency output characteristics in se mode r l c c lowest frequency 3 ? 330 f 161hz 4 ? 330 f 120hz 8 ? 330 f 60hz 32 ? 330 f 15hz 10000 ? 330 f 0.05hz 47000 ? 330 f 0.01hz as table 4 indicates, most of the bass response is attenuated into a 4- ? load and 8- ? load is adequate, headphone response is good, and drive into line level inputs (a home stereo for example) is exceptional. using low- esr capacitors low- esr capacitors are recommended throughout this applications section. a real (as opposed to ideal) capacitor can be modeled simply as a resistor in series with an ideal capacitor. the voltage drop across this resistor minimizes the beneficial effects of the capacitor in the circuit. the lower the equivalent value of this resistance the more the real capacitor behaves like an ideal capacitor.
EUA6011A ds6011a ver 1.0 mar. 2006 19 thermal pad considerations the thermal pad must be connected to ground. the package with thermal pad of the EUA6011A requires special attention on thermal design. if the thermal design issues are not properly addressed, the EUA6011A will go into thermal shutdown when driving a heavy load. the thermal pad on the bottom of the EUA6011A should be soldered down to a copper pad on the circuit board. heat can be conducted away from the thermal pad through the copper plane to ambient. if the copper plane is not on the top surface of the circuit board, 8 to 10 vias of 13 mil or smaller in diameter should be used to thermally couple the thermal pad to the bottom plane. for good thermal conduction, the vias must be plated through and solder filled. the copper plane used to conduct heat away from the thermal pad should be as large as practical. if the ambient temperature is higher than 25 j ,a larger copper plane or forced-air cooling will be required to keep the EUA6011A junction temperature below the thermal shutdown temperature (150 j ). in higher ambient temperature, higher airflow rate and/or larger copper area will be required to keep the ic out of thermal shutdown.
EUA6011A ds6011a ver 1.0 mar. 2006 20 package information note 1. package body sizes exclude mold flash protrusion or gate burrs 2. tolerance 0.1mm unless otherwise specified 3. coplanarity :0.1mm 4. controlling dimension is millimeter. 5. die pad exposure size is acco rding to lead frame design. 6. standard solder map dimension is millimeter. 7. followed from jedec mo-15 dimensions in millimeters dimensions in inches symbols min. nom. max. min. nom. max. a ------ ------ 1.15 ------ ------ 0.045 a1 0.00 ------ 0.10 0.000 ------ 0.004 a2 0.80 1.00 1.05 0.031 0.039 0.041 b 0.19 ------ 0.30 0.007 ------ 0.012 c 0.09 ------ 0.20 0.004 ------ 0.008 d 7.70 7.80 7.90 0.303 0.307 0.311 e ------ 6.40 ----- ------ 0.252 ------ e1 4.30 4.40 4.50 0.169 0.173 0.177 e ------ 0.65 ----- ------ 0.026 ------ l 0.45 0.60 0.75 0.018 0.024 0.030 y ------ ------ 0.10 ------ ------ 0.004 0 ------ 8 0 ------ 8 use as much copper area as possible bottom view exposed pad

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